TMS320VC5409PGE100

digital signal processor, QFP-144, -0.3 V to 4.0 V, Advanced Multibus Architecture

Rated 5 Rating 5 | reviews | Write a review

Price:: US $1.00~100.00 / piece [Get Latest Price]

Reference price:

Qty (lots)	Price/lot
	US $1.00~100.00

PartNumber:: TMS320VC5409PGE100

Brand:: Texas Instruments - TI | Pack: QFP | D/C: 11+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

Total Price:: US $0

Place Order via Escrow Service

Sold By

Ms. jamby's store

(Hong Kong)

add to my favourite

100% Positive feedback

Detailed seller ratings

Visit Store

Contact Now

Esrcow Service

Place orders confidently and securely via it

Safe payments
Quick and easy transactions
Free service charges

Learn More >>

Previous Next

Products Upload time: 2011-10-21

From Other Seller

Part Number:TMS320VC5409PGE100
US $1.00 - 100.00
FM31256-G

US $2.40 - 4.20 / Piece
(0) Remove
HEF4051BT

US $0.15 - 1.20 / Piece
(0) Remove
Quantity:

piece

Product Summary

The TMS320VC5409PGE100 fixed-point, digital signal processor (DSP) (hereafter referred to as the 5409 unless otherwise specified) is based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. The TMS320VC5409PGE100 provides an arithmetic logic unit (ALU) with a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The basis of the operational flexibility and speed of this DSP is a highly specialized instruction set.

Parametrics

TMS320VC5409PGE100 absolute maximum ratings: (1)Supply voltage I/O range, DVDD: -0.3 V to 4.0 V; (2)Supply voltage core range, CVDD: -0.3 V to 2.4 V; (3)Input voltage range, VI: -0.3 V to 4.5 V; (4)Output voltage range, VO: -0.3 V to 4.5 V; (5)Operating case temperature range, TC: -40℃ to 100℃; (6)Storage temperature range, Tstg: -55℃ to 150℃.

Features

TMS320VC5409PGE100 features: (1)Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Memory Bus; (2)40-Bit Arithmetic Logic Unit (ALU), Including a 40-Bit Barrel Shifter and Two Independent 40-Bit Accumulators; (3)17- × 17-Bit Parallel Multiplier Coupled to a 40-Bit Dedicated Adder for Non-Pipelined Single-Cycle Multiply/Accumulate (MAC) Operation; (4)Compare, Select, and Store Unit (CSSU) for the Add/Compare Selection of the Viterbi Operator; (5)Exponent Encoder to Compute an Exponent Value of a 40-Bit Accumulator Value in a Single Cycle.